1. Field of the Invention
The present invention relates to a process for forming a thin film for an SOI substrate, or photoelectric transducers such as solar cells and area sensors.
2. Related Background Art
The integrated circuit formed on a SOI substrate (semiconductor on insulator) has various advantages over integrated circuits formed on a usual silicon wafer, such as (1) ease of separation of a dielectric material and potentiality of high integration, (2) high resistance against radiation rays, (3) low floating capacity and high speed processing, (4) no welling process required, (5) capability of latch-up prevention, and (6) high speed and low energy consumption owing to formation of a thin complete depletion type field effect transistor.
For formation of a substrate of the SOI structure, methods are disclosed in U.S. Pat. No. 5,371,037, and T. Yonehara et al., Appl. Phys. Lett., vol. 64, 2108 (1994). FIGS. 16A to 16E, and FIGS. 17A to 17D show the processes. In the drawings, the numerals 1 and 5 indicate a Si wafer, 2 a nonporous Si layer, 3 a porous Si layer, 4 an epitaxial Si layer, 6 a single crystalline Si layer, and 7 a Si oxide layer. Si wafer 1 as a device substrate shown in FIG. 16A is anodized to prepare a substrate constituted of nonporous Si layer 2 and porous Si layer 3 formed thereon as shown in FIG. 16B. Epitaxial layer 4 is formed on the surface of porous Si layer 3 as shown in FIG. 16C. Separately, Si wafer 5 as a supporting substrate shown in FIG. 16D is provided, and the surface is oxidized to form a substrate constituted of monocrystalline Si layer 6 and Si oxide layer 7 on the surface as shown in FIG. 16E. The substrate (2, 3, 4) of FIG. 16C is turned over, and is placed on the substrate (6, 7) of FIG. 16E with epitaxial layer 4 and Si oxide layer 7 counterposed as shown in FIG. 17A. The two substrates are bonded by adhesion of epitaxial layer 4 to Si oxide layer 7 as shown in FIG. 17B. Then nonporous Si layer 2 is removed mechanically by grinding from the non-bonded layer side to uncover porous Si layer 3 as shown in FIG. 17C. Porous Si layer 3 is removed by wet etching with an etching solution for selective etching of porous Si layer 3 as shown in FIG. 17D to obtain a SOI substrate having epitaxial layer 4 of extremely uniform thickness for a semiconductor of an SOI substrate.
In the above process for producing the SOI substrate, nonporous Si layer 2 is removed from the substrate of FIG. 17B by grinding to obtain the substrate of FIG. 17C. Therefore, one substrate 1 to be worked into two-layers of nonporous layer 2 and porous layer 3 is required for production of one SOI substrate. Japanese Patent Application Laid-Open No. 7-302889 discloses a method of repeated use of nonporous Si layer 2 in the SOI substrate production process. In the disclosed process, parts 4,7,6 for the SOI substrate are separated from part 2 at porous layer 3 by applying a pulling, squeezing, or shearing force, or inserting a jig into porous layer 3, and separated nonporous Si layer 2 is used repeatedly as Si wafer 1 of FIG. 16A.
Nowadays, most solar cells employ amorphous Si for the structure suitable for large areas. However, monocrystalline Si and polycrystalline Si are also noticed for the solar cells in view of the transducing efficiency and the life thereof. Japanese Patent Application Laid-Open No. 8-213645 discloses a process of providing a thin film solar cell at a low cost. In this process, porous Si layer 3 is formed on Si wafer 1; thereon, p.sup.+ -type Si layer 21, p-type Si layer 22, and n.sup.+ -type Si layer 23 are grown epitaxially for solar cell layers; protection layer 30 is formed on n.sup.+ -layer 23; jig 31 is bonded to the reverse face of Si wafer 1 and jig 32 is bonded onto the surface of protection layer 30 by adhesive 34; jigs 31,32 are pulled respectively in opposite directions to break porous Si layer 3 mechanically to separate solar layers 21,22,23. The solar cell layers 21,22,23 are interposed between two plastic substrates to provide a flexible thin film solar cell. This disclosure mentions repeated use of Si wafer 1, and partial notching 33 of the edge side face of porous Si layer 3 by a mechanical method or laser beam irradiation.
In production of SOI substrates, the process disclosed in the aforementioned Japanese Patent Application Laid-Open No. 7-302889 enables reduction of the production cost by repeated use of the Si wafer. However, this method is not satisfactory in reproducibility.
In production of solar cells, the process disclosed in the above Japanese Patent Application Laid-Open No. 8-213645 does not always allow definite separation at the porous Si layer, causing occasional cracking in the epitaxial layer to result in lower production yield. Further, this process conducts the separation by mechanical pulling, which requires strong adhesion between the jig and the monocrystalline Si layer and is not suitable for mass production.